122 lines
3.4 KiB
Markdown
122 lines
3.4 KiB
Markdown
# ESP32-S3 CAN FD Logger - Pin Validation
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## Hardware Configuration Overview
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**Board**: ESP32-S3-WROOM-1-N16R8
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- Flash: 16MB Quad SPI
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- PSRAM: 8MB Octal SPI (uses GPIO33-37)
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- Cores: Dual Xtensa LX7 @ 240MHz
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## Pin Assignment Analysis
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### HSPI (CAN FD MCP2518FD)
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| Pin | GPIO | Function | Status | Notes |
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|-----|------|----------|--------|-------|
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| MISO | GPIO13 | SPI Data In | ✅ OK | - |
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| MOSI | GPIO11 | SPI Data Out | ✅ OK | - |
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| SCLK | GPIO12 | SPI Clock | ✅ OK | - |
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| CS | GPIO10 | Chip Select | ✅ OK | - |
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| INT | GPIO3 | Interrupt | ⚠️ OK | No USB conflict (USB not used) |
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### SDIO 4-bit (SD Card)
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| Pin | GPIO | Function | Status | Notes |
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|-----|------|----------|--------|-------|
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| CLK | GPIO39 | SDIO Clock | ✅ OK | - |
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| CMD | GPIO38 | SDIO Command | ✅ OK | - |
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| D0 | GPIO40 | SDIO Data 0 | ✅ OK | - |
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| D1 | GPIO41 | SDIO Data 1 | ✅ OK | - |
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| D2 | GPIO42 | SDIO Data 2 | ✅ OK | - |
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| D3 | GPIO21 | SDIO Data 3 | ⚠️ WARNING | Strapping pin (see below) |
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### I2C (DS3231 RTC)
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| Pin | GPIO | Function | Status | Notes |
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|-----|------|----------|--------|-------|
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| SDA | GPIO8 | I2C Data | ✅ OK | - |
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| SCL | GPIO9 | I2C Clock | ✅ OK | - |
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## Critical Pin Analysis
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### 1. PSRAM Conflict Check ✅
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**PSRAM uses**: GPIO33, 34, 35, 36, 37
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**Our pins**: GPIO3, 8, 9, 10, 11, 12, 13, 21, 38, 39, 40, 41, 42
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**Result**: NO CONFLICT
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- All our pins are outside the PSRAM range (33-37)
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- SDIO pins (38-42, 21) are safe to use
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### 2. GPIO21 (Strapping Pin) ⚠️
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GPIO21 is a **strapping pin** used during boot:
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- Internal pull-up resistor (~10kΩ)
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- Used for boot mode selection
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- Safe to use after boot initialization
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**Recommendation**:
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- SDIO_D3 (GPIO21) will work correctly
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- Pull-down resistor is already present in strapping logic
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- No additional hardware changes needed
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### 3. GPIO3 (INT Pin) ⚠️
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GPIO3 is USB D- in USB mode:
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- User confirmed: **USB NOT USED**
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- USB CDC is used via Native USB (GPIO19/20)
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- Safe to use GPIO3 for CAN interrupt
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## Arduino IDE Configuration
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### Board Settings
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```
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Board: ESP32S3 Dev Module
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USB CDC On Boot: Enabled
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CPU Frequency: 240MHz
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Flash Mode: QIO 80MHz
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Flash Size: 16MB (128Mb)
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Partition Scheme: 16M Flash (3MB APP/9.9MB FAT)
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PSRAM: OPI PSRAM
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Upload Mode: UART0 / Hardware CDC
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Upload Speed: 921600
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```
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### Why These Settings?
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- **USB CDC On Boot**: Required for Serial.println() to work over USB
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- **Partition Scheme 16M**: Maximizes available flash for app and SPIFFS
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- **PSRAM OPI**: Required for 8MB Octal PSRAM operation
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- **Upload Mode UART0**: Standard serial upload via USB
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## Pin Mapping Reference
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```
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GPIO Function Status
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---- -------- ------
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3 CAN_INT OK (USB unused)
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8 RTC_SDA OK
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9 RTC_SCL OK
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10 HSPI_CS OK
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11 HSPI_MOSI OK
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12 HSPI_SCLK OK
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13 HSPI_MISO OK
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21 SDIO_D3 OK (Strapping pin)
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38 SDIO_CMD OK
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39 SDIO_CLK OK
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40 SDIO_D0 OK
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41 SDIO_D1 OK
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42 SDIO_D2 OK
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PSRAM Pins (DO NOT USE):
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33-37 Reserved for Octal PSRAM
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```
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## Summary
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✅ **All pins validated successfully**
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- No PSRAM conflicts
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- SDIO 4-bit mode pins are available
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- CAN FD interrupt pin is safe (USB not used)
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- RTC I2C pins are standard and available
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⚠️ **Warnings (non-critical)**
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- GPIO21 is strapping pin but safe for SDIO after boot
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- GPIO3 would conflict with USB if USB Serial was used
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**Hardware is ready for implementation.**
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